简介： • 80C51 Central Processing Unit (CPU). – Option for multiple CPU clock (XTAL1, XTAL1 x 2, or XTAL1 / 3 ). – Industrial standard 80C51 instruction set. – Normal mode, idle mode, and stop mode. • Program Memory : 16 kbytes on-chip flash memory. – with hardware ISP (In-System Programming). – Program code protection. • Main Data RAM: 256 bytes (upper 128 + lower 128 bytes) of on-chip SRAM. • Aux Memory (AUX RAM): 768 bytes of SRAM. • Stretch memory cycle for the MOVX instruction. • SFRs (Special Function Register): 47 SFRs. • Timers: Timer 0, Timer 1, and Timer 2. • On-chip Watchdog Timer. • Full-duplex UART • Five I/O ports: Port 0, Port 1, Port 2, Port 3, and Port 4 (P4.0 ~ P4.3). • On-chip power-on-reset with low-voltage detection and reset. • Interrupts: 6 sources, 2 priority level, 6 vectored addresses. • Software enable/disable of ALE output pulse to reduce EMI. • 4-channel, 6-bit ADC. • 5-channel, 8-bit PWM. • CPU operating frequency range: 2 to 30 MHz • Operating temperature range: 0 to +70°C • Operating voltage range: 2.7 to 3.6 V. • ESD: ≥3 KV (HBM). • Latch-up: 150 mA. • Relibility of 16K flash memory: – Data retention: 10 years at room temperature. – Number of read/write cycle: > 20K. • Available in 3 types of Pb-free package: PLCC44, QFP44, LQFP48.