out RS;
out !DacCs;
io
RsEn,
La0, /* Latched A0 */
La1; /* Latched A1 */
)
{
/* Uncomment next line for test vectors */
/* #define TEST_VEC */
/* Output enables */
Dac_Cs.oe = 1;
La0.oe = 1;
La1.oe = 1;
RsEn.oe = 1;
Rs.oe = RsEn;
/* equations */
La0 = ( Dac & A0 )| ( !Dac & La0 );
La1 = ( Dac & A1 )| ( !Dac & La1 );
RsEn = ( SwReset | TrgReset | HostReset | PowerOnReset);
Rs = 1;
Dac_Cs = Dac;
/* Part assignment */
putpart("g16v8", "504884b",
_, Dac, Xfer, SwReset, TrgReset, A0, A1, HostReset, PowerOnReset, GND,
_, _, La0, La1, _, Dac_Cs, Rs, RsEn, _, VCC );
#ifdef TEST_VEC
/* Test Vectors */
test( Reset, TrgReset, Dac, A1, A0 => La0, La1 )
{
/* Put in known state */
( 1, 1, 0, 0, 0 => 0, 0 );
/* Test Reset */
( 1, 0, 1, 0, 0 => 0, 0 ); /* Onboard Reset */
( 0, 1, 1, 0, 0 => 0, 0 ); /* Target Reset */
/* Test Latch */
( 1, 1, 1, 0, 0 => 0, 0 ); /* Latch closed */
( 1, 1, 1, 1, 1 => 0, 0 ); /* Holding old value */
( 1, 1, 0, 1, 1 => 1, 1 ); /* Open Latch */
( 1, 1, 1, 1, 1 => 1, 1 ); /* Close latch */
( 1, 1, 1, 0, 0 => 1, 1 ); /* Holding old value */
}
#endif
}