楼 主:avrmpu 2003年9月9日14:28

 请教cpld高手
我在学习xillinx cpld xc95108,使用开发工具是xilinx公司的webpack
新建工程light
input 为clk
output 为led0--led7
assign pin 为：
net clk loc=p83;
net ledout1  <0>   loc=p31;
net ledout1  <1>   loc=p32;
net ledout1  <2>   loc=p33;
net ledout1  <3>   loc=p34;
net ledout1  <4>   loc=p35;
net ledout1  <5>   loc=p36;
net ledout1  <6>   loc=p37;
net ledout1  <7>   loc=p39;
 
开发工具自动设为：
net name                  new pin              old pin             

----------------------------------------------------------------------

clk                       pin72                   pin83                  

ledout1  <0>                  pin1                    pin31                  

ledout1  <1>                  pin6                    pin32                  

ledout1  <2>                  pin14                   pin33                  

ledout1  <3>                  pin71                   pin34                  

ledout1  <4>                  pin32                   pin35                  

ledout1  <5>                  pin45                   pin36                  

ledout1  <6>                  pin21                   pin37                  

ledout1  <7>                  pin57                   pin39                  

编译时说有冲突，请教高手指点