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*第13634篇: 新东西！！！
楼 主:
新东西！！！哪位高手对SMBUS的程序模块开发有兴趣，肯出手的话，我可以提供有关资料。
1. What is System Management Bus?
The System Management Bus (SMBus) is a two-wire interface through which simple system and power
management related chips can communicate with the rest of the system. It is based on the principals of
operation of I²C.
SMBus provides a control bus for system and power management related tasks. A system using SMBus
passes messages to and from devices instead of tripping individual control lines. Removing the individual
control lines reduces pin count. Accepting messages ensures future expandability.
With System Management Bus, a device can provide manufacturer information, tell the system what its
model/part number is, save its state for a suspend event, report different types of errors, accept control
parameters, and return its status.
The System Management Bus may share the same host device and physical bus with I²C components
provided that the electrical and timing specifications of this document are adhered to.
Intel conceived the System Management Bus originally, as the communication bus to accommodate Smart
Batteries and other system and power management components. In 1994 SMBus became part of the Onboard
ACCESS.bus specifications. In January 1995 Philips announced in New York the royalty free status
of ACCESS.bus devices including On-board ACCESS.bus compliant devices. In 1996 the Smart Battery
System specifications were handed by Intel and Duracell to a group of 10 companies that formed the core
group of the SBS. In 1997 the SBS Implementers Forum was formed and SMBus became part of the
specifications handled by this group. The same year SMBus was incorporated into the ACPI specifications
as the bus to communicate with the Smart Battery System and other system components, such as
temperature sensors, etc. ACPI specifications also defined the SMBus host interface to the OS.
2. General Characterist
SMBus is a two-wire multi-master bus, meaning that more than one device capable of controlling the bus
can be connected to it. A master device initiates a bus transfer and provides the clock signals. A slave
device can receive data provided by the master or it can provide data to the master. Since more than one
device may attempt to take control of the bus as a master, SMBus provides an arbitration mechanism, based
on I2C and relying on the wired-AND connection of all SMBus interfaces to the SMBus.
If two or more masters try to place information on the bus, the first to produce a “ONE” when the other(s)
produce a “ZERO” looses arbitration and has to release the bus. The clock signals during arbitration are
wired-AND combination of all the clocks provided by SMBus masters. Bus clock signals from a master
can only be altered by clock stretching or by other masters only during a bus arbitration situation.
In addition to bus arbitration, SMBus implements the I2C method of clock low extending in order to
accommodate devices of different speeds on the same bus.
SMBus version 1.1 can be implemented at any voltage between 3 and 5 Volts +/- 10%. Devices can be
powered by the bus VDD or by their own power source (such as Smart Batteries) and they will inter-operate
flawlessly as long as they adhere to the SMBus electrical specifications.
The following diagram shows an example implementation of a 5 Volt SMBus with devices powered by the
bus VDD inter-operating with devices powered by their own power supply.
第2楼:
推荐，你到这边去问问 yblee，
他不知有没有这个兴趣，
给我一份看看先！谢谢！给我一份看看先！谢谢！
to Language因为网络的故障我稍后发给你！
第5楼: 你找人合作？ 与I2C有什么区别SMBUS与I2C有什么区别?