No.58904 作者:飞天一剑 邮件:goodluckforyou@126.com ID:23817 登陆:3次 文章数:3篇 最后登陆IP:61.185.202.125 最后登陆:2005/4/13 16:41:33 注册:2004/7/24 17:27:14 财富:114 发帖时间:2004/7/24 17:29:05 发贴者IP:61.185.202.125 标题:飞天一剑:编译错误请教 摘要:No.58904编译错误请教 我运行后有错误,调了半天还是搞不定,没办法,只好请教各位高手了! 我把完整程序发上来,请各位高手指正!!! library IEEE; USE ieee.std_logic_1164.ALL; USE ieee.std_logic_arith.ALL; use IEEE.Std_logic_unsigned.all; Entity part1 is Port(busy : IN std_logic; data_ad: in STD_LOGIC_VECTOR(15 DOWNTO 0); data : out STD_LOGIC_VECTOR(15 DOWNTO 0)); end part1; architecture rtl of part1 is signal q1 : STD_LOGIC_VECTOR(15 DOWNTO 0) ; signal q3 : STD_LOGIC_VECTOR(19 DOWNTO 0) : ="00000000000000000000" ; signal q4 : STD_LOGIC_VECTOR(19 DOWNTO 0) : ="00000000000000000000" ; signal q5 : STD_LOGIC_VECTOR(19 DOWNTO 0) : ="00000000000000000000" ; signal q6 : STD_LOGIC_VECTOR(19 DOWNTO 0) ; constant a3 : STD_LOGIC_VECTOR(19 DOWNTO 0) : ="00100000000000000100"; -- -917500的二进制补码; ......
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