.cseg
reset:
  ldi r16,high(ramend)
  out SPH,r16
  ldi r16,low(ramend)
  out SPL,r16
  ldi r16,0xbb
  out DDRB,r16
  ldi r16,0xfe
  out DDRE,r16
main:
  
  ldi r16,0x00
  ldi r17,0x18
  out UBRR1H,r16
  out UBRR1L,r17
  ldi r16,0x08
  out UCSR1B,r16
  ldi r16,0x86
  out UCSR1C,r16
  ;ldi r16,0x50
 ; rcall delay
middle:
  ldi ZL,low(table*2)
  ldi ZH,high(table*2)

 
 
send: 
  sbis UCSR1A,UDRE1
  rjmp send 
  
  lpm
  mov r16,r0
  cpi r16,0xff
  breq middle
  out udr1,r16
  ld r0,z+
  sbis UCSR1A,TXC
  rjmp send
 

.cseg
.org table
;.DB 0x1b,0x11,0x78,0x64
.DB 0x1B,0x20,0x04,0x1b,0x27,0x00,0x1b,0x18
.DB 0x1b,0x25,0x51,0x1b,0x24,0x48,0x50,0x2d,0x41,0x31,0x30,0x30
.DB 0x1b,0x23,0xc4,0xda,0xbe,0xb5,0xc8,0xc8,0xbc,0xab,0x1b,0x10,0x02
.